1. Field of the Invention
This invention relates to a flat panel display device, and more particularly to a method for fabricating a thin film pattern and a method for fabricating a flat panel display device using the same that are adaptive for forming an organic material pattern by not using a photo-lithography process to control a capacitance value of a capacitor.
2. Discussion of the Related Art
The display device has become very important as a visual information communicating media in information society. A Cathode Ray Tube (CRT), which has been a main stream of the display device, has problems of heavy weight and bulky volume.
Flat panel display devices include a liquid crystal display device (LCD), a field emission display (FED), a plasma display panel (PDP) and an electro-luminescence (EL), etc.
Flat panel display devices include a plurality of thin film patterns, and each thin film pattern is formed by a photolithography process and an etching process.
FIG. 1A to FIG. 1C illustrate a manufacturing procedure in which a thin film pattern is formed using a photolithography process and an etching process.
First, referring to FIG. 1A, a metal layer 4a is deposited on substrate 2 for a flat panel display device by a deposition technique such as a sputtering, etc. Next, a photo-resist pattern 5 is formed by carrying out a photolithography process including a photo-resist coating, exposure and development process as shown in FIG. 1B. A first thin film pattern 4 is formed by carrying out the etching process using the photo-resist pattern 5 as a mask as shown in FIG. 1C.
A plurality of thin film patterns are disposed by the photolithography process and the thin film patterns are electrically connected or electrically insulated to each other by an electrical contact of each thin film pattern. For example, if each metal thin film pattern wants to be electrically insulated, an insulating film would be used.
In FIG. 2, if a second thin film pattern 8 electrically separated from the first thin film pattern 4 formed by FIG. 1A to FIG. 1C is formed, an insulating film 6 is formed and then the second thin film pattern 8 is formed by the above-mentioned photolithography process and etching process.
The insulating film 6 is, may be formed by an inorganic insulating material such as SiNx, etc that is disposed by a deposition technique such as a PECVD, the sputtering, etc. In order to properly deposit the inorganic material, the disposing process would be performed at least twice.
The insulating film 6 formed of the inorganic insulating material has a drawback that allows a step coverage formed by the first thin film pattern 4 positioning at a lower portion so as to be kept to decrease a smoothing degree on the substrate 2. In order to make up for the drawback of the inorganic insulating film 6, as shown in FIG. 3, a technique for providing an organic insulating film 7 formed of an organic material has been suggested. Unlike the inorganic insulating film 6, the organic material is not coated by a deposition technique such as the PECVD, the sputtering, etc., instead, a coating technique, such as a spin coating or spinless coating, etc., is used to provide the organic insulating film 7. The organic insulating film 7 unlike the inorganic insulating film 6 removes a step coverage generated by the first thin film pattern 4. Also, the organic insulating film 7 has a more simple manufacturing process and cheaper cost than the inorganic insulating film 6.
When a first metal thin film pattern and a second metal thin film pattern are insulated from each other by the insulating material and a current or a voltage is supplied to each metal thin film pattern, a parasitic capacitor is formed between the metal thin film patterns.
For example, if the current or the voltage is supplied to the first thin film pattern 4 and the second thin film pattern 8, a first parasitic capacitor A is formed between the first thin film pattern 4 and the second thin film pattern 8. Also, if a third thin film pattern 10 is formed, a second parasitic capacitor B is formed between the first thin film pattern 4 and the third thin film pattern 10.
The capacitance values of such parasitic capacitors A and B can be adjusted to be small or large in accordance with a user's requirement. For this, it requires that a thickness of the organic insulating film 7 is controlled as shown in Equation (1).
                    C        =                  ɛ          ⁢                      A            d                                              (        1        )            wherein ε represents a dielectric constant; d represents a distance between the electrodes and A represents an electrode area.
A capacitor is inversely proportional to a distance between the electrodes like equation 1. Thus, the thickness of the organic insulating film 7 is controlled to adjust the capacitance value of the parasitic capacitor.
However, referring to FIG. 4, if step coverage of the organic insulating film 7 is formed to reduce the distance between the first thin film pattern 4 and the third thin film pattern 10, a photolithography process using a mask is required.
For example, the organic insulating material is coated, and the organic insulating material is partially exposed and developed by using a half tone mask, etc. so that the organic insulating film 7 having step coverage is provided.
In this case, the exposure, the development process and a mask manufacturing cost, etc. are added to the photolithography process using the mask. Therefore, forming the organic insulating film 7 having step coverage has a problem in that the manufacturing process is complicated and the cost is increased.